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VMEbus P2/J2 User Defined Pins
By John Rynearson, Technical Director, VITA
Question? The P2 connector on VMEbus has 64 user I/O lines. What can these lines be used for?
The VMEbus standard specifies two board sizes known as 3U and 6U. The 3U size board is 100 mm x 160 mm and has one connector known as P1. The P1 connector has 96 pins and contains all the control signals needed to support the VMEbus. In addition P1 will support 24 bit addressing and 16 bit data transfers. The 6U size board is 233.5 mm x 160 mm and has an additional connector known as P2. P2 contains an additional 8 address lines and 16 data lines to provide full 32 bit address and 32 bit data capability in non multiplexed mode. 64 bit data transfers can be executed by multiplexing address and data lines as specified in the new VME64 Specification, currently pending ANSI recognition. The VMEbus only needs the middle 32 pins on row B on the P2 96 pin connector, for the additional address and data lines. The 64 pins in rows A and C are left as user defined input/output.
There are three popular uses for these pins: additional signal pins, input/output pins, or secondary bus pins.
Additional Signal Pins
Some applications may require signal pins such as a clock or an event start line or unusual voltage that is not available on standard VMEbus. If you are designing your own VMEbus board, you can use these lines for special signals. These "user defined pins" may be added to every slot on the backplane or they may be added to only the slots that require them. When user defined lines are added, the system becomes either backplane unique or slot unique. Care must be taken when adding an off-the-shelf VMEbus compatible product to make certain that conflicts don’t occur. Manufacturers may use these lines to implement a secondary bus or to bring I/O onto or off of the board. The bottom line is check for conflicts.
Input/Output Pins
Input/Output is an important part of any VMEbus system. The issue is how to get I/O off of or onto the VMEbus board. Two options exist. The first option is to bring I/O through the VMEbus front panel. This approach is popular but has two problems. Front panel space is limited and board removal may require decabling the system. The second option is to bring I/O through the P2 user defined pins. The advantage of this approach is that board removal doesn't require decabling. However, slot positions do become specific to a particular board. Plugging the wrong board into the wrong slot can at lease guarantee a system failure and at worse cause system damage.
Secondary Buses
The 64 user I/O lines on the P2 connector can also be used for a secondary bus. For example, if additional bandwidth is required, a secondary bus can be used to off load data traffic from the VMEbus. Continuous data traffic between CPU boards and a disk controller can be transferred to a secondary bus allowing the VMEbus to be used for general control purposes. For a long time, the VSB (VME Subsystem Bus) has been the bus of choice for a secondary bus for use with VME. It covers six slots on VME and provides both block transfers of data, multimaster capability, and one level interrupt capability. Its performance is similar to that of the VMEbus.
Within the past several years, additional standards have been proposed for P2. In the VITA Standards Organization (VSO) a number of P2 buses have been proposed for standardization. These proposals include Raceway Interlink, SkyChannel, SCSA (Signal Computing System Architecture), Heterogeneous Interconnect (HIC), and QuickRing. While none of these specifications will become "the standard" for P2 on VME, each does provide unique features that allow the system integrator a wide choice to address specific problems.
In addition, certain manufacturers have indicated interest in enhancing the VSB specification to provide increased performance. Transferring data on both clock edges and/or doubling the data path width could provide two to four times the current data transfer rates.
Some companies have also proposed putting PCI on VME's P2 connector. PCI has become very popular as a local bus interconnect and is used as the electrical interface for the PMC mezzanine bus interface. PCI requires 100 signal pins plus 88 other pins for grounds, voltages, and other miscellaneous signals. Squeezing this onto the enhanced 160 pin P2 connector while not impossible would require some creative engineering. Stay tuned for further developments.
Summary
The P2 64 User Defined I/O lines have provided VMEbus with the flexibility to meet a wide variety of application needs. They can be used for special signals, board input/output, or secondary bus implementation. When setting up a VMEbus system, the system developer needs to map out P2 use to make sure that application requirements are met.
This page last updated: Sep 19, 1999
Reprinted from the VITA Journal with permission from VITA.