Vi-ta [vee-tuh]

Critical Embedded Systems
are everywhere . . .

Become a leader in setting new directions!


only search VITA site

Physical Tools to Aid in FMC+ Development; Dylan Lang, Standards Manager, Samtec

Thursday, May 28, 2020 11:01 AM | VITA Marketing (Administrator)

Versatility in function and interoperability among components are common requirements of embedded systems, which is why standards play such a crucial role in an environment where many companies are contributing to system development.  Here we look at FMC and FMC+ and the growing need for support mechanisms that facilitate standards implementation, thereby enabling embedded engineers to develop robust and forward-looking systems for use in modern applications.

FMC (FPGA Mezzanine Card), as defined in VITA 57, and FMC+, as defined in VITA 57.4, provide specifications describing an I/O mezzanine module with connection to an FPGA or another device with reconfigurable I/O capabilities. The low-profile design allows FMC and FMC+ to be used on popular industry standard slot card, blade and motherboard form factors, including VME, VPX, CompactPCI, AdvancedTCA, MicroTCA, PCI, PXI and many other low-profile motherboards. The compact size is highly adaptable to many configuration needs and complements existing common low-profile mezzanine technology such as PMC, XMC and AMC.

FMC/FMC+ modules are currently utilized in several different applications and with many different host carrier form factors, and the list is growing. The result is a diverse FMC/FMC+ ecosystem that extends beyond traditional VITA boundaries, benefiting an expanding FPGA engineering community. In addition, the increasing complexity from the implementation of the newest generations of technology require better development tools than ever before.

Why are new tools needed in an existing ecosystem?

Because of the growth and complexity in today’s embedded systems, many designers have begun to face unique challenges in FPGA development.  These can range from mechanical concerns in unmating large numbers of mated pairs, ease of access, achieving taller stack heights as well as testing and system debugging. 

To alleviate these concerns, a new study group within VITA was formed: VITA 57.5 Physical Tools to Aid in FMC+ Development.  The goal was to develop solutions to these problems, thereby giving FPGA designers easy-to-use options and offering flexibility in applications.  Mechanically, these tools are easy to deploy, while maintaining ruggedibility.  Electrically, designers can have confidence in utilizing these tools in existing designs without signal or performance degradation.

What tools are included, how are they to be used?

VITA 57.5’s study group currently includes four solutions to employ within FMC/FMC+ systems.  It is worth noting that, while the focus of this group is on FPGA development solutions, these tools can also be used within any hardware application, as well, since mechanical and electrical compatibility remain the same.  These tools include:

1. Micro Jack Screw Precision Board Standoffs (JSOM)

Some FPGA mezzanine cards may present a challenge to unmate from their host.  In order to ensure the connector set is not damaged, the Micro Jack Screw Standoff (JSOM) from Samtec not only acts as a standard PCB standoff, but to also aid in unmating the connector set. (Figure 1)

Figure 1: This standardized PCB standoff also protects components from damage during the mating/unmating process of an FMC card.

2. High Data Rate (HDR) FMC+ Cable Assembly

FPGA development can encompass many different applications and needs.  In some cases, the addition of mezzanines cards may present a challenge to mate with the host, due to space constraints or even ease of access.  Samtec’s FMC+ HDR Cable Extension gives the FPGA developer an additional 397.8 mm of length to test the carrier cards away from the host without signal/performance degradation.  The cable is ideal for benchtop testing, system debugging, probing and FPGA development or for regularly accessing a system where cards would need to be separated from the host board.

Figure 2: The HDR Cable Assembly enables testing of the carrier card way from the system without signal loss or performance degradation.

3. FMC+ Loopback Cards

FPGA carrier card developers require easy-to-use options to confirm the operation of the FMC+ expansion connector typically found on these platforms. FMC+ loopback cards make testing the HSPC and HSPCe interfaces on FPGA carrier cards much easier to manage and are ideal for benchtop testing, system debugging, probing or FPGA development.  

These types of cards typically provide FPGA designers an easy-to-use loopback option for testing low-speed interfaces and high-speed multi-gigabit transceivers on an FPGA development board or carrier card. Two examples are Samtec's HSPC Loopback Card (REF-197618-01) and HSPC/HSPCe Loopback Card (REF-197693-01) that can run system data or BER testing on all channels in parallel. This makes evaluation and development with an FPGA much easier and an ideal substitute for 28 Gbps test equipment.

4. FMC+ Extender Cards

Engineers prototyping with industry-standard FPGA evaluation and development kits often leverage the FMC+ interface for I/O expansion that fits their application needs. In some cases, the mating height of the standard connectors may prevent fully leveraging the connectivity options of all FMC+ modules.

An FMC+ extender card has been developed to place between FPGA carrier cards and FMC+ modules. The increased space provided can be used for additional I/O expansion during development.  As another alternative, the extender card provides a cost-effective option for extending the life of the FPGA carrier card used as a test platform.

Innovations Continue

With the four current tools—JSOMs, extension cables, loopback cards and extender cards—all currently available, VITA 57.5’s study group continues to work on other improvements.  Read the VITA 57.5 application notes or join the discussion to propose other useful tools for FMC/FMC+ on LinkedIn.

This supporting documentation presents mechanical and electrical data along with recommendations for an FPGA design.  As these are living documents, the plan is to continue to update these periodically as other test data becomes available.  We look forward to the growth of FPGA development and the VITA hardware markets with these new tools.

Copyright © 1996-, VITA. All rights reserved.
VITA Copyright and Use Notice
VITA Privacy Policy


only search VITA site
Powered by Wild Apricot Membership Software